The Communicator is designed to collect information from a variety of implanted cardiac devices and send it to a healthcare team to assist them in managing ongoing care.

I was responsible for the following:

• Dev Board bring-up
• Integrate SPI Ethernet stack and maximize reliable throughput
• Port existing application code to new device. Linux to ARM FreeRTOS
• Rewrite task initiation, communication, and scheduling
• Rewrite file system interface
• More details to follow, this project is a Work-in-Progress

The Lithovue™ Ureteroscope family changes the way you think about flexible ureteroscopy. It delivers detailed high-resolution digital images for high-quality visualization and navigation - to help you remove stones quickly, safely and affordably.

The single use device eliminates inconsistent performance and device degradation, maintenance hassles and costs, reprocessing delays for sterilization, and proliferation of the "superbug".

The Next Generation (Elite) devices greatly improve the image quality through higher image resolution, more responsive light control, patent pending image processing techniques, and lower image latency. These devices also integrate seamlessly with a Fluid Management System and a Laser Lithotripsy System in the StoneSmart™ suite fo devices. The new system is also designed to allow physicians to monitor intrarenal pressure during ureteroscopy procedures to make pressure-related decisions in real time.

I was responsible for the following:

• Design the image processing pipeline on an Intel FPGA (including Fixed Pattern Noise, Debayer, Histogram, Gamma Correction, Color Space Converters, Luminance and Chroma enhancements, 2d FIR (sharpening), Denoise, Clipping and Scaling, non-Uniformity Correction, Combining and Splitting video sources,
• Specify and validate the configuration of an OV426 bridge processor, including real time register corruption detection. Design and implement a software interface library
• Simulate and spec filters & enhancing IP for the pipeline
• Create calibration architecture for the pipeline
• Mock-up and implement UI demos for trade shows and evaluations
• Integrate DisplayPort libraries for video output configuration and resolution negotiation
• Integrate DVI input including EDID
• Troubleshoot PCIe video frame buffer bugs interfacing the Linux Kernel
• Rendering of real-time dynamic pressure graphs
• Design a RTOS environment for the NIOS II processor including watchdog, memory validation and protection, IRQ handling with virtual masking, semaphore protection (atomic instructions not supported), task priority integration, and overflow protection
• Evaluate and mitigate various hardware and user errors including criticality classification, and appropriate software actions to ensure patient safety
• Implement a fault log / Stack Dump for unrecoverable errors. This included writing of data to NVM when the system is assumed unstable and corruption is highly possible
• Create a software library for a master interfaces including I2C, SPI, UART and others
• Create a brand new Communication Interface Spec between processors, including processing of development versus production supported commands. Over 100 commands total
• Integrate an Elmos 703.xx pressure sensor, secure write enable routines, including IC calibration, NVM validation, and temperature compensation
• Integrate ambient pressure sensors for relative pressure calculations, including a tool to routinely service and recalibrate for the sensor drift
• Integrate a NVM EEPROM with support for lockable pages, DMA, and partitioning for ultra fast loading of device calibration data
• Designing and implementing data encryption and validation mechanisms to prevent fraudulent reproduction and reuse of scopes. This included evaluations of several hashing algorithms for limited processing power and tight timing constraints
• Design a state driven calibration loading routine to segment longer routines within a RTOS environment
• Integrate a DAC for current controlled LED, including software shutdown.limiting routines reading temperature and current sensors to prevent damage to the electronics
• Design, implement, and optimize a light control feedback loop, including a nonlinear responsiveness curve, simplified histogram using limited resources, an LED dependent calibration routine, and a manufacturing test acceptance criteria
• Integrate a temperature sensor in the FPGA fabric to shutdown the device during over-current and over-temperature conditions
• Integrate GPIO devices including IRQs, switch debouncing, and stuck pin detection for responsiveness and reliability.
• Design and integrate versioning of software and hardware components including GPIO pins and PFGA registers. This is used to verify software support, and patch issues on specific revisions of device hardware between board spins
• Create and allocate a memory mapping of all static frame buffers and allocations used by FPGA IP. Validate the segregation of components to prevent corruption
• Design a timer interface including virtual interrupts, time zone and localization, and a RTC interface to prevent spoofing
• Design a development only test interface for software validation including internal testing routines, GPIO and debug output
• Design a service mode boot image for application upgrades and routine maintenance of the console
• Support the ability for secure boot (boot image signatures), backup factory/recovery boot, and verified software upgrades via USB stick
• Write, review, test, and validate system and software requirements
• Design and validate POST routines
• Validation of off-the-shelf SOUP libraries
• Writing and reviewing of the Software Design Document
• Design, simulate, code, and optimize a patent pending image enhancement method (SPIE Publication)

I worked closely with Electrical Engineers to integrate software on new hardware platforms. These products were driven by certain major electrical components going end of life, which prompted a refresh of the entire unit. Most notably, it boasted a new processor family to keep up with growing functionality requirements. The new products were designed to support the growing needs of aviation software for the next decade.

Some of the more notable efforts and hurdles include:

• Prototyped and integrated a new analog joystick to replace the digital interface. This allows the pilot enhanced control when panning on maps and charts.
• Integrated an existing touchscreen platform which had been used on other units. This required updating the FPGA interface to support the new processor.
• Updated the Boot Loader to support variable memory sizes, kernel binaries, and recovery partitions.
• Updated the recovery kernel to support remote software loading. This allowed bricked units to be recovered without requiring the unit to be taken apart to connect expensive and limited JTAG debuggers.
• Converted several conditionally compiled code sections to runtime software decisions. These conditions were previously per unit dependent, preventing the shared binary from being scaled to units with varying hardware support.
• Traced and reported the root cause of a bug in the Trace32 development environment.
• Integrated new backup power logic which supported various super capacitor sizes.
• Investigated an issue with Microsoft Windows resolving NET/CIFS addresses on optional ethernet interfaces.
• Added library support for processor driven graphics dithering which supports a much wider variety of screen interfaces. This was key to integrating a new 18 bit screen without a noticeable impact on unit performance and aesthetics.
• Designed and implemented a new board configuration platform. This allowed software to detect and support various revisions of boards with varying features, without breaking backwards compatibility.
• Integrated software support for retrieving the processor extended trace buffer when errors are detected. This greatly helped developers reproduce and investigate a wide variety of rare and complex bugs.

The Kernel library is shared amongst most of Garmin’s aviation products. It powers everything ranging from audio panels to Multi Function Displays and GPS computers. The library also supported a large array of hardware components and processors. As a component owner, I was responsible for reviewing proposed design changes, evaluating new issue scopes and time estimations, and determining system impacts. During this time, I lead a project to re-certify the library for a new family of processors under a new testing environment. This required reviewing the software to create manageable tickets, estimating time requirements, analyzing test coverage, managing a group of over 10 interns, and ensuring the work was completed on time and in sync with the ongoing development release cycle. The entire process took several months, and greatly reduced the time impacts of future feature development.

In addition to ownership responsibilities, I also actively integrated new features into the library. One such notable project was upgrading the ethernet packet processing platform to rely on a new memory management component. Not only did this greatly reduce the processing overhead, but allowed the library to be scaled to new embedded products which were designed with reduced memory availability and speed.

Managed the verification and recertification of the entire library for new technologies, including multicore processors. This project lasted several months, required several weeks of planning and preparation, and required the training and coordination of over ten interns and five full-time associates.

The Garmin Simulators are used for product training and trade show demonstrations. They are also used extensively by internal engineers and technicians for system testing, issue reproduction, and feature integration. Demonstration mode also helps our system benches pair with flight simulators for a fully responsive simulated cockpit.

In order to minimize project scope and keep compatibility with legacy units, I was required to integrate an interface between the Direct X graphics driver (Microsoft Windows application) and the Open GL driver (which rendered the graphics on the hardware). Another large scale project I worked on included scoping and integrating ARINC 610B design requirements into the Garmin Integrated Flight Deck simulated environment.

As component owner, I was responsible for the following:

• Developed and maintained system level regression tests to ensure releases had a very high level of quality and excellence. This includes stress testing and CPU consumption analysis.
• Was proactive and involved in all design, coding, reviewing, maturing, and testing of the component’s features and functions.
• Point of contact for internal and external customers. This includes having detailed discussions and meetings with people having a wide knowledge base. As owner of the demonstration mode, this included gathering feature enhancement ideas from internal divisions such as Technical Publications, Engineering, Trade Show Personnel, Teachers, and many more. I was also responsible for discussing problems with external customers, which is typically personnel working for the airframe manufacturers.
• Maintain and address issues with our system simulators and lab benches such as the Human Factors Lab. This also includes troubleshooting issues with PC to device communication, and device to flight simulator communication and compatibility.
• Maintained a prioritized list of issues and enhancements for scheduled and unscheduled releases. This included scheduling, estimating the time requirements, analyzing defects for worst case scenarios, distributing work load, and much more.
• Maintained and reviewed documentation for internal customers and other component leads.
• Was knowledgeable about adjacent components and understanding their roadmaps and requirements.
• Performed document release activities for FAA compliance.

I was proud to be a key team member for Garmin Aviation, helping to design and create the next generation of avionics. These new products are extremely scalable, offering solutions from low budget FAA compliant requirements such as ADS-B, to fully scaled avionics as the G5000 integrated flight deck. This new generation is increasing safety, capability, aircraft and pilot efficiency, and even integrating connectivity to the cockpit, all while reducing weight, cost, and physical space requirements.

As a software engineer in aviation, I was responsible for creating both high and low-level design requirements, developing complete solutions and implement them, writing and performing tests to ensure completeness, robustness, and proper error handling, fully determining the impacts, and getting everything reviewed at each step along the way. This vigorous life cycle required an imaginative approach to cover every conceivable corner case in order to provide the safest, and most complete solution possible. It also required an immense amount of technical leadership and project planning to ensure that preexisting and certified platforms were not impacted by major changes to the shared libraries.

During this time, I worked on everything from the integrated lighting bus; box to box alert blink synchronization, a synthetic vision system that included obstacle, terrain, and traffic in a computer augmented reality; and all the way to flight plan input and display improvements.

The formal Garmin job description when I started in 2012 was as follows:

• Decompose functional requirements into well-defined tasks
• Research fundamental problems and implement algorithm solutions that are appropriate
• Balance quality, quantity and complexity in work output
• Offer peer technical assessments in areas of expertise, new technologies and software designs
• Work with software vendors to integrate externally developed deliverables into projects
• Make substantial contributions toward determination of project goal/objective feasibility
• Offer process improvement suggestions and author new procedures as appropriate
• Apply good judgment in setting schedules and risk taking
• Participate in product definition activities such as feature analysis and system tradeoffs
• Exemplify Garmin’s Mission Statement and Quality Policy and proactively works to improve Garmin’s image and culture

Thesis Research:
View my full Thesis hosted by MTU.

• Problem - Charging the batteries of PHEVs and PEVs will increase the daily electricity demand by per household approximately 40%. This aggregated demand can decrease efficiency and threaten grid stability during peak usage hours.
• Proposed Solution - Implement a primary distribution controller to collect Location Marginal Pricing (LMP) predictions and vehicular constraints in order to schedule the charging/discharging times for vehicles connecting to the feeder.
• Outcome - This optimized scheduling which increased the base load with little to no increase in the peak demand. This also improved power quality while reducing the peak demand under certain conditions.

Published:
Transportation Electrification Conference and Expo (ITEC) 2012 - Minimizing residential distribution system operating costs by intelligently scheduling plug-in hybrid electric vehicle charging.

Graduate Advisors:
Dr. Chee-Wooi Ten - MTU Profile - LinkedIn Profile
Dr. Chungxaio (Tricia) Chigan - MTU Profile - LinkedIn Profile

Relevant Courses:
Embedded Sensor Networks, Dist Embedded Control Systems, Computer Networks, Distribution System Emergency, Artificial Intelligence, Detection and Estimation Theory, GPU and Multicore Programming (audit), Graph Theory and Optimization, Advanced Computer Architecture.

GPA 3.61

Graduate Teaching Assistantship
Was a teacher for the following labs:

• EE4800: Practical Circuit Design Covers specific topics in electrical engineering.
• EE4735: Embedded System Programming Introduces concepts and skills of microcontrollers with limited resources. Describes basic microcontroller interfaces with sensors, motors and networks. Topics include microcontroller programming using C, real time operating systems, embedded networking and embedded control, sensor networks, and mobile robotics.
• EE3306: Electronic Design with Microprocessor Covers the design and analysis of electronic circuits with microprocessor applications.
• EE3305: Circuit and Analysis Lab Covers circuit design and analysis, and linear system applications.
• EE3010: Circuits and Instrumentation Designed for non-majors. Covers the principles of electrical and electronic measurements, including dc, ac, semiconductor devices, amplifiers, and filtering.
• EE2304: Logic and Signals Lab Experimental solution of engineering problems. Includes design, simulation, and evaluation; advanced measurement techniques in digital and signal processing systems.

Awards:
2011 Graduate Teacher of the Year Award - Department of Computer and Electrical Engineering.

Relevant Courses:
Embedded System Programming, Systems Programming, Electric Energy Systems, Computer Graphics - Foundations, Digital Image Processing.

GPA 3.45

Senior Design:
Automotive Climate Control Device Validation - Sponsored by Behr-Hella ThermoControl. I was part of a team that created a mobile bed of nails platform for product testing and validation.
The mobile, all inclusive, test device could be taken to any vehicular testing center. This allowed for technicians in charge of validating the hardware (Thermal Control Systems in Chevy Vehicles) to determine where the devices failed. Previous to this, technicians would have to ship the faulty control board units back to the factory, using the end of line bed of nails validation device to determine which components and devices were broken. This problem not only cost them time and money in shipping charges, but it required the product line to be halted while they tested the hardware .
Our solution weighed less than 30 pounds, had a battery supply for when a wall outlet was not available, and was able to communicate with any laptop with National Instrument’s Labview. Since the company created two types of boards, a technician could switch out the testing hardware easily without any special training. The bed of nails utilized testing points on the boards in addition to reading CAN error codes to determine the problem with specified hardware. This was used to find problem areas, allowing designers to create more robust units while keeping the production costs to a minimum.

Study Abroad:
University of Malta in 2009 - Studied history, international relations, architecture, and globalization.

Internship:
Skyweb Networks 2008 - Skyweb Networks was a small internet service provider consisting of less than 20 people. Skyweb utilized wireless modems to grant high speed (Up to 6Mbps) internet to residents in rural areas around Saginaw who were outside of the service area for other ISPs and did not want the high latency of DSL. In addition to this, we also served customers in the metropolitan area of Saginaw who wanted an alternative ISP with better customer service.
I assisted employees with everything from hot spot surveys and setup to configuring modems for installation in residential customer’s homes.
I was also part of a team responsible for fixing and rebuilding broken computers. These devices ranged from virus infected or unbootable machines to those that suffered hardware failure and needed parts replaced. These machines ran on all operating systems including Microsoft Windows, Apple OS, and various Linux distributions.

Undergraduate Teaching Positions:
Worked in the Computer Science Learning Center for 2 years.
Worked in the Electrical Engineering Learning enter for an additional 2 years.